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AOOC- Wishbone Amiga OCS SoC Implementation

AOOC- Wishbone Amiga OCS SoC Implementation

Details

Category:芯片上的系统

Created:December 19, 2010

Updated:2020年1月27日

Language:Verilog

其他项目属性

Development Status:Beta

附加信息:FPGA证明

WishBone compliant:Yes

Wishbone版本:N/A。

执照:BSD

描述

The OpenCores aoOCS SoC is a Wishbone compatible implementation of most of the Amiga Original Chip Set (OCS) and computer functionality.
AOOCis not related in any way with Minimig - it is a new and independent Amiga OCS implementation.

介绍

July 2011: Project copied to (https://github.com/alfikpl/aoOCS). Further development of aoOCS will continue on github.

Features

  • The aoOCS SoC contains the following Amiga/OCS components:
    • blitter
    • copper
    • system control (interrupts)
    • 视频:位数,精灵,碰撞检测
    • audio: 4 channels, low-pass filter
    • user input: PS/2 mouse, PS/2 keyboard and joystick (keyboard arrow keys)
    • floppy: read and write ADF files directly from a SD card. Only the internal floppy drive is implemented
    • 8520年中央情报局
    • AO68000 Opencores IP核心用作AOOCS处理器
  • 以上所有组件均为Wishbone修订B.3兼容
  • AOOC包含以下其他组件:
    • 用DMA编写的SD卡控制器。仅支持SDHC卡。
    • 用HDL编写的10/100 MBIT以太网控制器发送当前的VGA框架(框架抓框)
    • HDL drivers for SSRAM, PS/2 keyboard, PS/2 mouse, audio codec, VGA DAC
  • AOOCS仅使用一个外部内存:带有36位单词和管道访问的SSRAM。SSRAM位于大约250KB的视频缓冲区。ROM使用了另外256KB。所有休息记忆都可以用作芯片公羊。
  • 屏幕上的显示器在HDL中作为有限状态机实现。处理SOC所需的固件没有其他控制器/处理器。
  • The following options are available on the On-Screen-Display:
    • select ROM file to load (only Amiga Kickstart v1.2 was tested)
    • enable or disable Joystick (keyboard arrow keys)
    • 启用或禁用软盘写保护
    • 插入软盘 - 从列表中选择一个
    • eject an inserted floppy
    • reset the system
  • The On-Screen-Display is independent of the running Amiga software. It is enabled and disabled by the Home key and controled by the keyboard arrow keys and the right CTRL key.
  • Only PAL timings are implemented.
  • 视频输出与VGA兼容:640x480在70 Hz时。一种相当简单的方法用于将256个PAL的水平线扩展到480个VGA线:除了每8个外,所有线都会加倍。
  • 该系统通常使用一个时钟:30 MHz。还有两个时钟:与外部硬件(音频编解码器,以太网控制器)接口的12 MHz,25 MHz生成。单个AltPll用于生成一个50 MHz外部时钟的所有三个时钟。有关时钟的更多信息,可以在时钟上找到。
  • 实现了VGA框架抓键,该抓框通过IP/UDP数据包中的100 mbit以太网发送捕获的帧。
  • 该系统在Altera Cyclone II上使用了约26.400 LE,大约267.000位片上RAM。
  • The blitter functionality was tested against the E-UAE Amiga software emulator.
  • 仅在Terasic DE2-70板(www.terasic.com.tw)上进行测试。
  • Documentation generated by Doxygen (www.doxygen.org) with doxverilog patch (http://developer.berlios.de/projects/doxverilog/). The specification is automatically extracted from the Doxygen HTML output.

叉骨兼容性

  • 版本:Wishbone规范修订版B.3,
  • 一般说明:32位叉骨接口,
  • Wishbone数据端口大小:32位,
  • Data port granularity: 8-bits,
  • Data port maximum operand size: 32-bits,
  • 数据传输订购:大恩迪安,
  • Data transfer sequencing: UNDEFINED,
  • 约束clk_i信号:时钟中描述。

Similar projects

Other Open-Source Amiga implementations include:

  • minimig(http://code.google.com/p/minimig/) - FPGA-based re-implementation of the original Amiga 500 hardware. Runs on the Minimig PCB and also on Terasic DE1,2 boards.

限制

  • No filesystem support on the SD card. Data is read from fixed positions. The contents of the SD card is generated by theAOOC_tooldescribed at Operation.
  • 没有视频外部同步,蕾丝模式,灯台,genlock音频启用,颜色复合材料(BPLCON0)
  • All bitplain data is fetched at once in a burst memory read at the begining of each line. No changes to the bitplain data done after the beginning of a line are visible.
  • 目前,AOOC需要一个36位单词SSRAM来存储视频缓冲区。这样,3个像素可以用一个单词存储12位。
  • 未实现串行端口。
  • Parallel port not implemented.
  • Low-pass filter disable/enable by CIA-A port A bit 1 not implemented.
  • Proportional controller and light pen not implemented.
  • Some rarely used OCS registers are not implemented: strobe video sync, write beam position, coprocessor instruction fetch identify. For a complete list of not implemented registers look at Registers.
  • Only some of the Amiga software was tested and works on the aoOCS. A list of aoOCS software compatability is located at Operation.

TODO

  • 修复上述一些限制。
  • Optimize the design.
  • 运行Wishbone验证模型。
  • More documentation of Verilog sources.
  • 描述在E-UAE来源中进行的测试和更改。
  • Prepare scripts for VATS: run_sim -r -> regresion test.
  • 将AOOCS SOC移植到Xilinx FPGA。

Status

  • Amiga Workbench v1.2 runs with some minor graphic problems: bottom of screen not displayed correctly.
  • Prince of Persia runs perfectly.
  • 愤怒的翅膀正确运行。简介中的一些声音故障。
  • Lotus 2 runs correctly. Some sound problems in intro.
  • Warzone runs poor. Some major graphic problems.
  • 有关AOOCS软件兼容性的更多信息可在操作中提供。
  • July 2011: Project copied to (https://github.com/alfikpl/aoOCS). Further development of aoOCS will continue on github.

要求

  • Altera Quartus II synthesis tool (http://www.altera.com) is required to synthesise theAOOCSystem-on-Chip.
  • Java SDK(http://java.sun.com) is required to compile theAOOC_tool(The tool is described in Operation).
  • A FPGA board. Currently only the Terasic DE2-70 board was tested.
  • 伊卡洛斯Verilog模拟器(http://www.icarus.com/eda/verilog/需要编译并运行一些测试。
  • Access to Altera Quartus II directory (directory eda/sim_lib/) is required to compile and run some tests.
  • GCC(http://gcc.gnu.org)需要编译一些测试es based on E-UAE sources.

结构图:

AOOCstructure diagram,

屏幕截图:

Amiga Kickstart v1.2 bootstrap screen with aoOCS On-Screen-Display

Amiga Kickstart v1.2 bootstrap screen with aoOCS On-Screen-Display

Amiga Workbench v1.2 screen

Amiga Workbench v1.2 screen

愤怒的翅膀

愤怒的翅膀

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