Introduction to DRAM (Dynamic Random-Access Memory)

本文将研究动态随机访问存储器（DRAM）的基本操作，以及如何组织DRAM芯片。

What Is DRAM?

记忆is fundamental in the operation of a computer. When combined with a CPU, the ability to run sets of instructions (programs) and store working data becomes possible. Random-access memory (RAM) is a well-known type of memory and is so-called because of its ability to access any location in memory with roughly the same time delay.

Dynamic random access memory, or DRAM, is a specific type of random access memory that allows for higher densities at a lower cost. The memory modules found in laptops and desktops use DRAM.

DRAM与SRAM

将来的文章可能会讨论其他类型的记忆，例如SRAM，MRAM和FLASH。简而言之，DRAM代表动态的随机记忆，SRAM代表静止的random-access memory. The largest differences are that DRAM utilizes capacitors (as we'll discuss later in this article) where SRAM does not, though there are also considerations such as different processing, different speeds, and different cost for developers.

How Does DRAM Work?

Robert Dennard于1966年在IBM发明，DRAM的工作方式与其他类型的记忆差异很大。DRAM中的基本存储单元由两个元素组成：晶体管和电容器。

当需要放入记忆中时，晶体管将用于充电或排放电容器。带电的电容器代表逻辑高或“ 1”，而放电电容器表示逻辑低或“ 0”。充电/放电是通过文字线和位线完成的，如图1所示。

图1。In DRAM a bit is stored as the presence or absence of charge on a capacitor

During a read or write, the wordline goes high and the transistor connects the capacitor to the bitline. Whatever value is on the bitline ('1' or '0') gets stored or retrieved from the capacitor.

每个电容器上存储的电荷太小，无法直接读取，而是由称为感官放大器的电路测量。感官放大器检测到电荷的微小差异，并输出相应的逻辑水平。从比特线读取的行为迫使电荷从电容器流出。因此，在DRAM中，读取具有破坏性。为了解决这个问题，完成了一个称为预耕种的操作，以使从位线读取的值重新读回电容器。

同样有问题的是，电容器随着时间的推移泄漏充电的事实。因此，要维护存储在内存中的数据，必须定期对电容器进行刷新。令人耳目一新的作品就像阅读一样，并确保数据永远不会丢失。这是DRAM从中获得“动态”绰号的地方 - DRAM电池上的电荷经常动态刷新。将其与SRAM（静态RAM）保留状态而无需刷新的SRAM（静态RAM）对比。

How Is DRAM Organized?

DRAM可以取决于应用程序。图2显示了包含多个板载DRAM芯片的DIMM（双线内存模块）。

图2。1 GB DIMM，其中包含许多DRAM芯片

该DIMM包含1 GB的内存，但请注意贴纸上打印的“ 2RX8”。2R表示该模块为等级2，而X8（发音为“八个”）表示来自每个DRAM芯片的数据的输出宽度。等级是单独寻址的一组DRAM。在这种情况下，一个排名是四个DRAM芯片。由于总共有八个（前/后部），因此我们有2个等级。

The rank of a DRAM module is the highest level of organization within a DIMM. Below that, each chip is organized into a number of banks and memory arrays containing rows and columns. Figure 3 shows a DRAM chip with four banks.

图3。与四家银行一起燃烧芯片

每个银行独立于其他银行运营。这意味着阅读，写作和预处理都可以在一家银行上完成，而不会影响另一个银行。

等级，银行，行和专栏

As mentioned earlier, the rank of a DRAM is a set of separately addressable DRAM chips. Each DRAM chip is further organized into a number of banks that contain a set of memory arrays. The number of memory arrays per bank is equal to the size of the output width. Therefore in a x4 DRAM chip, the internal banks would each have four memory arrays. Figure 4 shows an example of a single x4 bank.

Figure 4.由解码器，感官放大器和内存数组组成的X4银行

灰色部分是设计为行和列的网格的内存阵列。一组解码器用于访问行和列，选择内存数组中的单个相交。正是在此交叉点，一个小电容器存储代表所访问数据的电荷。

Sense放大器对电容器执行预处理操作，并为许多数据缓冲区生成逻辑级输出，这些数据缓冲区存储数据，直到可以通过内存控制器或CPU检索数据。

Conclusion

在本文中,我们研究的基本原理f operation behind dynamic random access memory, or DRAM. DRAM is extremely common in personal computers and is a basic component that any computer needs to work properly. DRAM works by using the presence or absence of charge on a capacitor to store data.

由于单个DRAM单元仅由两个组件组成（晶体管和电容器），因此可以在高密度下制成DRAM，并且与其他类型的内存相比，它比较便宜。我们还查看了包含多个DRAM芯片的DIMM，以及如何将这些DRAM芯片组织到记忆单元的阵列中。

下一篇DRAM文章将讨论用DRAM芯片控制和交换数据的命令。到时候那里见！