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CCD图像传感器类型:全帧,交货转移和帧转移CCD

2020年3月30日byRobert Keim

本文解释了三个CCD(电荷耦合设备)体系结构的特征,优势和缺点。

在里面上一篇文章,我们研究了半导体水平上CCD的一般结构。任何CCD图像传感器的两个最基本元素是光活动区域(例如pinned photodiode) and the charge-transferring structures (i.e., horizontal and vertical shift registers). But these elements can be organized and implemented in different ways, and consequently “CCD” is a general image-sensor category that consists of several subcategories.

在本文中,我们将研究全帧(FF),帧转移(FT)和Interline-Trans-Transfer(IT)CCD体系结构。

Full-Frame CCDs

I find it somehow counterintuitive that a semiconductor region could function as both a photoactive element and a charge-transfer device, but that’s exactly what happens in FF CCDs. During integration, the pixel location accumulates electric charge in response to incident photons. After integration, the charge packets are moved vertically through the pixel locations toward the horizontal shift register.

正如我们从上一篇文章中知道的那样,我们通过应用仔细定时的时钟信号来获得CCD像素数据,这些时钟信号在设备的电荷转移结构中依次创建潜在的井和潜在的障碍。在全帧CCD中,我们需要能够将这些控制电压应用于也充当光电视图的区域。因此,栅极电极由透明的多硅烷制成。

全帧CCD(相对)直接且(相对)易于制造,它们使整个CCD表面都具有光敏性。这最大化了可以包含在给定硅区域中的像素的数量,并且还最大化了每个像素的一部分,实际上能够将光子转换为电子。

However, a major limitation is the need for a mechanical shutter (or a synchronized, short-duration light source called a strobe). The photoactive areas of the CCD don’t stop being photoactive simply because you have decided that it’s time to perform readout. Without a mechanical shutter that blocks incoming light after the exposure period is complete, the charge packets generated during (intentional) integration would be corrupted by light that arrives during readout.

这是全帧CCD的基本体系结构。

帧转移CCD

通常,我们更喜欢以电子方式控制暴露。快门(像任何其他快速移动的高精度机械设备一样)使设计更加复杂,最终产品更昂贵,并且整体系统更容易受到故障。在电池供电的应用中,启动物理物体所需的额外能量也是不良的。

FT CCD允许我们维持FF CCD的某些好处,而(几乎)消除了快门的需求。这是通过将FF CCD分为两个同等大小的部分来完成的。这些部分之一是正常的光敏成像阵列,另一个是一个储存阵列,它避免了入射光。

After integration, charge packets for all of the pixels are rapidly transferred to the storage array, and then readout occurs in the storage array. While the storage locations are being read out, the active pixels can be accumulating charge for the next image, and this allows frame-transfer CCDs to achieve higher frame rates than full-frame CCDs.

I say that the FT architecture几乎eliminates the shutter because shutterless designs are subject to a problem called vertical smear. The transfer of charge packets from active pixels to storage locations occurs quickly, but not instantaneously, and consequently image information can be altered by light that reaches the sensor during the vertical transfer period.

Major disadvantages of the FT architecture are higher cost and increased area relative to image quality, since you’re basically taking an FF sensor and then reducing the number of pixels by a factor of two.

帧转移CCD将存储阵列添加到全帧架构中。

Interline-Transfer CCDs

我们需要的最后一个重大的建筑改进是将集成电荷转移到存储区域的一种方法,以至于将涂片降低到可忽略不计的水平。Interline-Transfer CCD通过提供与每个光活性位置相邻的存储(和传输)区域网络来实现这一目标。当曝光完成后,传感器中的每个电荷数据包都会同时转移到非光敏的垂直移位寄存器中。

Thus, IT CCDs enable electronic shuttering with minimal smear, and like FT CCDs, they can integrate during readout, thereby maintaining the higher frame-rate capability. However, some smear can occur if light-generated charge from the photoactive columns leaks into an adjacent vertical shift register during readout. If the application doesn’t require high frame rates, this problem can be eliminated by delaying integration until readout is complete.

Interline CCDs don’t require the large storage section used in frame-transfer CCDs, but they introduce a new disadvantage: the sensor becomes a less efficient means of converting photons to electrons, because each pixel location now consists of a photodiode and a portion of a vertical shift register. In other words, part of the pixel is not sensitive to light, and therefore less electric charge is generated relative to the amount of light falling on the pixel area. This loss of sensitivity is greatly mitigated by fabricating the sensor with the addition of tiny lenses that concentrate incident light onto the photoactive region of each pixel, but these “microlenses” come with their own set of difficulties.

在Interline-Transfer架构中,存储(和垂直传输)区域位于光活动柱之间。

结论

我希望本文可以帮助您了解CCD图像传感器设计所涉及的权衡。全画幅CCD似乎是最“原始”类型的类型,但我认为它们仍然是不需要高架速率并且可以忍受使用频闪或机械快门的系统的首选。帧转移CCD和Interline-Trans-Transfer CCD的用途更广泛,并在某些应用中具有至关重要的优势。

1 Comment
  • R
    理查德·柯林斯 2020年3月31日

    可以在主动照片区域下方实现交通转移区域吗?更多的是“下线”结构,在光层下方的层上制造?

    是否有人制作了CCD可以及时连续采样像素?每个像素都有一个独特的时间收集信息?

    我不希望整个帧或整行都以有限的次数收集数据,但是每个像素每个像素都有自己的时间插槽。我想最大程度地利用数据计算时间。1920x1080x30 FPS设备每秒仅收集1080x30行。但是,如果同一设备可以依次或随机处理像素,则可能会产生每秒的时间戳记的1920x1080x30像素值。差异是299792458/1920*1080*30 = 4.819米径向分辨率,而不是299792458/1080*30 = 9.253 km分辨率。

    有什么建议么?还是我必须等待CMOS文章?当然,有人必须做一个顺序的像素读芯片?

    Thank you for these articles. I look forward to more and longer ones.

    喜欢。 Reply